Education & Research

Modeling and Control of a Full-Bridge Modular Multilevel STATCOM

Publication date : Feb 2012
Paper File : PES12_MMCSTATCOM.pdf



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Author(s)

Jean Bélanger, Wei Li, Luc-André Gregoire,

Abstract

Due to its unique topology, the Modular Multilevel STATCOM has many advantages but requires a sophisticated controller and puts higher requirements on simulation tools. To simulate the STATCOM in real-time is preferable because it enables hardware-in-the-loop test of the system in various scenarios including extreme fault conditions, which cannot be tested on a real STATCOM. This paper presents a model of full-bridge sub-module which enables fast offline and real-time simulation of the STATCOM. A control scheme with a new SM capacitor voltage balancing method is also proposed in this paper. The model and the controller are investigated for different operating conditions. Implemented in a real-time simulator, the model can be simulated in real time at a time step of 20 µs, 131 times faster than its reference model. As demonstrated by the results, the proposed control scheme is effective and robust.

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A Novel and Flexible Test Stand for Medium Voltage Drives Using a Hardware-in-loop (HIL) Simulator

Publication date : Nov 2011
Paper File : A Novel and Flexible Test Stand for Medium Voltage Drives Using a Hardware-in-loop (HIL) Simulator.pdf



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Author(s)

Weihua Wang, Jean Bélanger, Christian Dufour, Ata Douzdouzani,

Abstract

With increasing complexity of topology and control strategies in medium voltage (MV) drives, a digital hardware-in-loop (HIL) simulator exhibits great advantage over a traditional analog test stand in terms of cost and flexibility. However, a great effort for developing a proper solver, an optimized design of the hardware, firmware and fine-tuning of the model is required to maintain sufficient accuracy of the HIL test stand. This paper presents the novel solver and the system architecture used by the HIL-simulation-based test stand for medium voltage drives. Test results of the ACS 6000 drives are shown under various conditions, and compared with the measurement acquired from the field testing.

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OP5142 - Spartan3 FPGA Reconfigurable I/O Node

The OP8710 High Voltage Interface Panel (HVIP) has the capability to provide digital signals of up to 250 VDC to equipment external to the Opal-RT Simulator.

  
Contact sales for more Info |  Request a Live Online DemoThis is a request to schedule an Online Demonstration of High Voltage Interface Panel (HVIP) - OP8710 with an Opal-RT Representative. |  Share Product

Real-Time Computer Simulation Helps Train Performance

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OPAL-RT Europe designed the real-time computer simulator that ESIEE Amiens uses to simulate the interaction between catenaries and pantographs. A team of engineers is currently using the simulator to advise railway industries seeking to improve high speed train performance by optimizing electrical energy transmission thanks to a greater understanding of physical phenomenon such as contact loss, mechanical faults or atmospheric conditions.

March 23, 2011 - Montreal, Quebec

FPGA-BASED REAL-TIME SIMULATION OF MULTILEVELMODULAR CONVERTER HVDC SYSTEMS

Publication date : Mar 2011
Paper File : FPGA-Based Real-Time Simulation of Multilevel Modular Converter HVDC Systems.pdf



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Author(s)

W. Li, L.-A. Grégoire, J. Bélanger,

Abstract

AC-HVDC-AC energy conversion systems using modular multilevel voltage-source converters (MMC) are becoming very popular to integrate distributed energy systems to the main grid. MMC AC-DC-AC converters are also being considered for large HVDC transmissions systems. Such multi-level converters pose a serious problem for HIL simulators required for control, protection design and testing due to the large number of cells that must be simulated individually using very small time steps. Such a system also requires managing a very large number of I/O channels within a few microseconds. This paper demonstrates the advantages of using a very small time step to simulate a modular multilevel converter (MMC). To do so, a hybrid simulation is done using Intel PC and FPGA. The MMC is implemented on FPGA to simulate fast transient with a time step of 500 ns to 1 μs. The AC network and HVDC bus is simulated on the PC, with a slower time step of 10 μs to 20 μs. The simulator architecture and the components simulated on the FPGA and on the PC will be discussed, as well as the method allowing the interconnection of this slow and fast system.

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Bike wheel with an electric motor running on a Hardware-in-the-loop Simulator

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Alan Soltis, Automotive Program Manager for Opal-RT Technologies, demonstrates a hardware-in-the-loop (HIL) simulator at the SAE 2011 Hybrid Vehicle Technologies Symposium in Anaheim, CA.

February 23, 2011 - Anaheim, CA, USA

The new OP5600 Chassis adds advanced monitoring capabilities and scalable I/O and processor power to OPAL-RT's line of real-time digital simulator systems including eMEGAsim, eDRIVEsim and eFLYsim.

Built using lower cost, high availability commercial-off-the-Shelf (COTS) components, the OP5600's modular and flexible design can be fully customized to meet specific I/O requirements and can be easily expanded as needed.

Key Features
  • Contains a powerful real-time target computer equipped with up to 12 3.3-GHz processor cores with the real-time operating system of your choice including QNX and Red Hat Linux.
  • Two user-programmable FPGA-based I/O management options available, powered by the Xilinx Spartan-3 or more powerful Virtex-6 FPGA processor.
  • Available expansion slots accommodate up to 8 signal conditioning and analog /digital converters modules with 16 or 32 channels each for a total of fast 128 analog or 256 discrete or a mix of analog and digital signals.
  • Acts as a single-target system or can be networked into a multiple-target PC cluster for complex applications capable of implementing large models with more than 3000 I/O channels and a time step below 25 micros.
  • Offers versatile monitoring on the front side, with RJ45 and mini-BNC, and standard connectors such as DB37 on the back side to connect user equipment for HIL simulation and testing. Status LEDs display FPGA synchronization status.

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Today’s Power System Simulation Challenge: High-performance, Scalable, Upgradable,Affordable COTS-Based Real-Time Digital Simulators

Publication date : Dec 2010
Paper File : India Conference 2011_LAG_final.pdf



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Author(s)

Luc-André Gregoire, Laurence A. Snider, Jean Bélanger, Girish Nanjundaiah,

Abstract

This paper describes today's power system simulation challenge. Simulator technology has evolved from physical/analogue simulators (HVDC simulators, TNA’s) for electromagnetic transients and protection and control studies, to hybrid TNA/Analogue/Digital simulators with the capability of studying electro-mechanical transient behaviour [1], to fully digital real-time simulators. Today’s global power system infrastructure is rapidly changing towards increasingly distributed generation/distribution systems, and this transformation mandates expanded use of power electronic devices: HVDC, FACTS and interfacing devices for dc and variable-frequency power sources (photovoltaic, wind generation).

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Hardware-in-the-Loop (HIL) to reduce the development cost of power electronic converters

Publication date : Jan 2011
Paper File : IICPE2010-HIL_multilevel_rectifier.pdf



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Author(s)

Luc-André Gregoire, Kamal Al-Haddad, Girish Nanjundaiah,

Abstract

This paper proposes a validation methodology for implementing solutions to challenges involved with power electronic converter design. Typically, the design process consists of first simulating the converter and then implementing it on hardware. Here, an intermediate step is added where the controller is connected to a real-time simulator before being connected to real hardware. This allows for virtual testing of scenarios that cannot be conducted with physical hardware without risking damage to the hardware. This technique will be demonstrated by implementing a new method of control, the drifting PWM, for a multilevel packed U-cell (PUC) converter. The drifting PWM allows for a slight variation in the switching state so that regulation of the auxiliary capacitor can be achieved. This method will be simulated offline and in real-time to demonstrate its long term reliability. Once fully functional, the controller is implemented on an FPGA board, from which it will control the real converter. Simulation results, as well as experimental results, are presented and compared. It is demonstrated that the HIL technique is a very effective tool for designing multilevel converter controllers.

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The What, Where and Why of Real-Time Simulation

Publication date : Oct 2010
Paper File : PES-GM-Tutorial_04 - Real Time Simulation.pdf



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Author(s)

Philippe Venne, Jean-Nicolas Paquin, Jean Bélanger,

Abstract

Simulation tools have been widely used for the design and improvement of electrical systems since the midtwentieth century. The evolution of simulation tools has progressed in step with the evolution of computing technologies. In recent years, computing technologies have improved dramatically in performance and become widely available at a steadily decreasing cost. Consequently, simulation tools have also seen dramatic performance gains and steady cost decreases.Researchers and engineers now have access to affordable, high performance simulation tools that were previously too costprohibitive, except for the largest manufacturers and utilities. This paper introduces the role and advantages of using real-time simulation by answering three undamental questions: what is real-time simulation; why is it needed and where does it best fit.The recent evolution of real-time simulators is summarized. The importance of model validation, mixed use of real-time and offline modes of simulation and test coverage in complex systems is discussed.

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