J. Bélanger

RECONFIGURABLE FLOATING-POINT ENGINES FOR THE REAL-TIME SIMULATION OF PECS: A HIGH-SPEED PMSM DRIVE CASE STUDY

Publication date : Jun 2011
Paper File : RECONFIGURABLE FLOATING-POINT ENGINES FOR THE REAL-TIME.pdf

Share this document:

Author(s)

T. Ould Bachir, J.P. David, J. Mahseredjian, J. Bélanger, C. Dufour,

Abstract

The real-time simulation of PMSM drives enables thorough testing of control strategies and allows rapid deployment of automotive applications. However, the simulation of power electronic circuits (PECs) in the context of a PC-based simulation is challenging for several reasons, and imposes a limit in the 1-5 KHz range to the achievable switching frequencies. As FPGA devices gain computing power, conducting the real-time simulation of PECs on chip becomes an attractive alternative. This paper demonstrates the feasibility of high-performance floating-point calculation engines aimed for the real-time simulation of PECs on high-end and low-cost FPGAs as well. The paper discusses emerging paradigms for reconfigurable floating-point computing that favor optimal performance and offer near double precision arithmetic at a minimal hardware cost. A proof of concept is proposed through the on-chip simulation of a 3-phase IGBT inverter drive capable of handling very high switching frequencies.

Related Products

RT-XSG
RT-XSG
ML506 - Integrated FPGA Development System

FPGA-BASED REAL-TIME SIMULATION OF MULTILEVELMODULAR CONVERTER HVDC SYSTEMS

Publication date : Mar 2011
Paper File : FPGA-Based Real-Time Simulation of Multilevel Modular Converter HVDC Systems.pdf

Share this document:

Author(s)

W. Li, L.-A. Grégoire, J. Bélanger,

Abstract

AC-HVDC-AC energy conversion systems using modular multilevel voltage-source converters (MMC) are becoming very popular to integrate distributed energy systems to the main grid. MMC AC-DC-AC converters are also being considered for large HVDC transmissions systems. Such multi-level converters pose a serious problem for HIL simulators required for control, protection design and testing due to the large number of cells that must be simulated individually using very small time steps. Such a system also requires managing a very large number of I/O channels within a few microseconds. This paper demonstrates the advantages of using a very small time step to simulate a modular multilevel converter (MMC). To do so, a hybrid simulation is done using Intel PC and FPGA. The MMC is implemented on FPGA to simulate fast transient with a time step of 500 ns to 1 μs. The AC network and HVDC bus is simulated on the PC, with a slower time step of 10 μs to 20 μs. The simulator architecture and the components simulated on the FPGA and on the PC will be discussed, as well as the method allowing the interconnection of this slow and fast system.

Related Products

RT-XSG
eMEGAsim
OP5142 - Spartan3 FPGA Reconfigurable I/O Node